1. Field of the Invention
Embodiments of the invention relate to a high voltage generation circuit for a semiconductor memory device. More particularly, embodiments of the invention relate to a high voltage generation circuit and method for reducing a peak value of consumption current and power noise.
2. Description of the Related Art
Semiconductor memory devices such as NAND flash memories, NOR flash memories, and electrically erasable programmable read-only memories (EEPROM) use a voltage higher than a normal power supply voltage to program or erase memory cells. For example, a flash memory device needs voltages having different voltage levels when performing program, erase, and read operations of memory cells. Thus, a voltage generation circuit is required to generate a plurality of high voltages having different voltage levels to accommodate these various operations.
FIG. 1 is a block diagram of a conventional high voltage generation circuit 100 having a plurality of high voltage generation units 110 and 120. These voltage units 110 and 120 generate high voltages VPP1 and VPP2, respectively, having different voltage levels. Voltage generation unit 110 includes regulator 112, clock generator 114 and pump 116. Similarly, voltage generation unit 120 includes regulator 122, clock generator 124, and pump 126. Regulators 112 and 122 generate enable signals EN_CLK1 or EN_CLK2 based on the voltage level of VPP1 or VPP2. Each of the regulators 112 and 122 generate the clock signal CLK1 or CLK2, respectively, in response to the corresponding enable signals EN_CLK1 or EN_CLK2. Clock signals CLK1 and CLK2 may have the same phase. Pumps 116 and 126 receive clock signals CLK1 and CLK2 and output high voltages VPP1 and VPP2 corresponding to the respective clock signals CLK1 and CLK2. As illustrated in FIG. 2, when the clock signals CLK1 and CLK2 have the same phase, the pumps 116 and 126 simultaneously start a pumping operation for generating high voltages VPP1 and VPP2. When pumps 116 and 126 simultaneously output high voltages VPP1 and VPP2, a peak value of consumption current and power noise in the high voltage generation circuit 100 increases. Moreover, when clock signals CLK1 and CLK2 have the same phase, pumps 116 and 126 perform the pumping operation at the same time. This causes the peak value of the consumption current and the power noise to further increase. Accordingly, in order to generate a stable high voltage in high voltage generation circuit 100, reduction of the peak value of the consumption current and power noise is desired.